Webinar Transcript: ANSYS SI Wave and IcePak Integration

Okay, we'll get started. Welcome to today's webinar, everyone. Today we'll talk about ANSYS SI Wave, with its capability in power signal integrity and coupling with ANSYS i-SPAC. Let's get started with SI Wave. First, we'll take a look at what ANSYS SI Wave is.

It's a hybrid full-width EM field solver that's finite element method based. It can model printed circuit boards as well as packages.

The analyses performed by this tool could be a DC analysis with thermal coupling, signal and power integrity, both on frequency and time domain, as well as electromagnetic compatibility and interference.

The general workflow of SI Wave is that you have a layout generated in the ECAD system, either it's from Cadence, Mentor Graphics, Altium, or Zuken. And then you put that in the drawing editor and then using the SIWave solver, either it's hybrid 2.5-D or 3-D, to tackle the geometry.

After that, we do a post-process whether it's in DC analysis, AC analysis. Outcomes include the circuit layout section for delivery, resonant modes, or SPICE models. In DC analysis, we have I2R drop, which is current distribution, signal flow graph, thermal coupling with i-SPEC.

In AC analysis, we have AC impedance analysis, S-parameter extraction, near and far field extraction, stack analysis, capacitor optimization. The SPICE models include ANSYS-Own, Nexium, H-SPICE, Cadence Spectra, P-SPICE, and Maxwell SPICE.

Something to emphasize on is that hybrid solver technology enables simulation of the entire system, either it's on a PCB or the package. From the DC analysis, we have a lot of information about the system.

From the pictures on this page, we can tell the top picture depicts a near field magnetic field at 778 megahertz. It's a prediction of the EMI on a dual processor quad-core PCB. In the middle picture, it's an insertion loss plot for a differential pair.

At the bottom, that would be a TDR plot for eight different signal lines. SL-WAVE supports prevalent ECAD translations from Cadence, Allegro, APB, SiP digital, Retoso, Zuken, ODB++, and other general ECAD formats.

In order to do a DCIR thermal coupling, we want to do a DCIR analysis, which is the I2R drop analysis on IC side waves. Why is it important to run a DCIR simulation? It would supply clean and sufficient power to today's high-speed semiconductors.

It would allow more functionality into every integrated circuit as desired. As we enter this era of ever-shrinking PCB sizes, it will enable us to operate many different IC functions onto one PCB.

This DCIR simulation would help avoid DC current crowding in pins, traces, and Vs, which can lead to PCB failure and bad circuit performance. It also debugs existing PCB designs, making minor layout changes that result in major performance and reliability improvements.

It reduces warranty costs associated with thermal cycling issues. The importance of DC simulation. Often, the failure is a lack of good DC design that may not lead to high DC resistance but probably caused thermal hotspots due to excessive temperatures and eventual product failure.

The solution to that would be robust and accurate DC in the PDN design results in a more even spread of current density and reduces risk of failure. When we're talking about DCIR simulation, it's often associated with Joule heating.

Joule heating is the process by which the passage of electric current through a conductor of electric resistance releases heat. Why do we need to perform such an analysis on the PCB board? High current PCBs are densely populated with components.

Reducing trace and via dimensions requires good thermal behavior. As PCB currents get higher, current densities increase, causing higher temperature on major components, such as the battery or CPU chip.

Geometric heating effects on copper traces cause temperature increases and thus cause reliability issues, causing PCB delamination and failure. The whole purpose of doing DCIR simulation is trying to prevent reliability issues and the delamination and failure of the PCB.

In order to do a DCIR simulation, we use the SI Wave DC solutions. A simple workflow would be import, set up, and simulate the DC power delivery network. After that, you can also combine the chip package, chip package and board to perform a system level analysis.

There's a variety of types of DCIR simulations we can do in SI Wave. The first being DCIR drop, which is voltage-based DCIR. We can also do a lot of DCIR drop, including power-based, for all of that including power, ground, and signals.

We can also do a DC current distribution, that the units will be amps per area squared, including the return path. We can also do a DC current magnitude, which tells you the amps into and out of the Vs. You could also do power density and total power loss per layer.

The next step is the DCI circuit, which is the DCI circuit in the circuit diagram. It can also do automated report generation with user-defined pass and fail criteria. And it also enables bidirectional coupling to i-SPAC for thermal loss simulations.

On the left side, it's the voltage drop across a power rail. We can see that in the center of the board, the voltage is relatively higher than the rest of the area. On the right side, it's the current distribution across the power rail.

We can tell that there's some major hotspot here at this component. This is a voltage drop from power supply to active devices. We can quickly identify high power regions. We can also identify current crowding in copper and high current vias. We can also generate a table for different element data.

The test table would generate itself and tell you whether certain vias pass or fail the test. It's a metalization current density check. The automated report can tell you voltage and current limits. It can also provide HTML or PDF format, and it's a layer-by-layer results.

It can also plot the signal flow graph. So this is a fully automated report that will identify path IR drop as well as drop across lump components along the power rails. It also specifies pass-fail criteria for current draw, voltage drop, or across active devices.

Once we've done a DC electrical analysis, we pass the DC heating losses in temperature field into a thermal analysis, which is IcePak. And generate this the temperature field. Then we check whether the max delta T is greater or smaller than our goal.

If it is, then we can pass the data into ANSYS Mechanical to do a thermal stress analysis, which is deformation. There's some initial setup in SI Wave to do the DCR simulation. We want to make sure you check export power dissipation in IcePak format so that you can couple with IcePak.

On the SI Wave side, we do a board layout file materials and the stack up. Then we set up the file. Things we can control include mesh options and voltages and currents. And also materials and stack up.

Then we pass the power loss to IcePak thermal and it can, it passes back with the temperature information. Starting from release 17.1, SI Wave users can quickly and easily set up an IcePak simulation in SI Wave.

Things you can do through SI Wave for IcePak include conduction only or convection, air flow inside enclosure, component power dissipation, and also enclosure size. Once you've decided to adapt this workflow, the simulation runs completely inside SI Wave. No IcePak GUI interaction is required.

By doing so, allows electrical engineers to quickly estimate board temperatures. Once we've done a DC electrical analysis, we can have a temperature map exported from IcePak to into SI Wave. This is pretty much it for the slides. I'll briefly show you some of the results.

We have a general PCB board with multiple layers. The simulation is already being performed. We're just taking a look at the results. We can check the current through the Vs, which via has a higher current, which via has a lower current.

We can also check current density, where you can see how the current generally flows on every layer. We can also view the profile and export the report as the HTML. We can also view the simulation properties, et cetera. So yeah, this is... Okay.

This is pretty much it in terms of introducing this thermocoupling with IcePak. Does anyone have any questions? If you have any questions, you can type in here in the chat. I'll try to answer them. Okay. So, I'm going to go ahead and get started. So, I'm going to go ahead and get started.

When can parents be available on the computer? Now, is this the very last one here if you've already subscribed? This is actually the fourth time. This is just the first time we're seeing it. Yeah, we're seeing it. Which one do you think is going to be the oldest bandwidth?

This will be the end of this webinar. Feel free to contact Ozen Engineering for any new information on the latest release. We have a 2019 R1 release recently. And also Ozen Engineering will be having an open house tomorrow.

So if any of you guys are available and interested, we welcome you in our office. It will be 11 to 2 p.m. Lunch will be provided. And we'll talk about some answers. Okay. Well, this is it for the webinar. Thanks for attending. Thanks for attention. Bye.